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CELL AND PACKET SWITCHES

 

 

High Capacity and High Port Count

 

In order to prevent switching bottlenecks and to enable large points-of-presence (POPs) in future telco networks and the Internet, carrying the world's voice, video and data services, it is crucially important that the design of future high capacity cell and packet switches (IP routers) should provide capacities beyond 10 Tbit/s and high port counts. Without these, switches and routers will not keep up with increases in link capacities due to increasing use of DWDM and large POPs will become complex, power thirsty and expensive1.

 

Traditional Store-and-Forward Designs

Traditional store-and-forward switches can be readily implemented, using electronic buffers to store the cells/packets and await routing and scheduling decisions for them. Various scheduling algorithms have been shown to work with Virtual Output Queues in various switching architectures to provide 100% throughput. But memory access speeds are unable to keep up even with Moore's Law, and Moore's Law increases insufficiently fast to keep up with increasing link speeds. Nevertheless, linecard designs exist that are scalable to 40 Gbit/s line rate and scheduling algorithms exist that are capable of supporting around 256 ports. In combination, these provide switch/router designs scalable to around 10 Tbit/s capacity1.

 

Beyond 10 Tbit/s

Beyond 10 Tbit/s capacity new scheduling algorithms and/or switch and router architectures will be needed to provide higher capacities and port counts. This is the area of current research. Greater parallelism, optical switching and even an evolution away from packet switching back to circuit switching have all been proposed1. To what extent optics will play a rôle in all this is a very interesting question. It may not only be used within a traditional store-and-forward architecture, but also provide completely new switching architectures and protocols such as optical burst switching.

 

1Source: Nick McKeown, Stanford University